We have demonstrated the millimeter-scale fabrication of monolayer epitaxial graphene p-n junction devices using simple ultraviolet photolithography, thereby significantly reducing device processing time compared to that of electron beam lithography typically used for obtaining sharp junctions. This work presents measurements yielding nonconventional, fractional multiples of the typical quantized Hall resistance at ( 12906 Ω) that take the form: . Here, a and b have been observed to take on values such 1, 2, 3, and 5 to form various coefficients of RH. Additionally, we provide a framework for exploring future device configurations using the LTspice circuit simulator as a guide to understand the abundance of available fractions one may be able to measure. These results support the potential for drastically simplifying device processing time and may be used for many other two-dimensional materials.

Atypical quantized resistances in millimeter-scale epitaxial graphene p-n junctions / Rigosi, Albert F.; Patel, Dinesh; Marzano, Martina; Kruskopf, Mattias; Hill, Heather M.; Jin, Hanbyul; Hu, Jiuning; Hight Walker, Angela R.; Ortolano, Massimo; Callegaro, Luca; Liang, Chi-Te; Newell, David B.. - In: CARBON. - ISSN 0008-6223. - 154(2019), pp. 230-237. [10.1016/j.carbon.2019.08.002]

Atypical quantized resistances in millimeter-scale epitaxial graphene p-n junctions

Marzano, Martina;Callegaro, Luca;
2019

Abstract

We have demonstrated the millimeter-scale fabrication of monolayer epitaxial graphene p-n junction devices using simple ultraviolet photolithography, thereby significantly reducing device processing time compared to that of electron beam lithography typically used for obtaining sharp junctions. This work presents measurements yielding nonconventional, fractional multiples of the typical quantized Hall resistance at ( 12906 Ω) that take the form: . Here, a and b have been observed to take on values such 1, 2, 3, and 5 to form various coefficients of RH. Additionally, we provide a framework for exploring future device configurations using the LTspice circuit simulator as a guide to understand the abundance of available fractions one may be able to measure. These results support the potential for drastically simplifying device processing time and may be used for many other two-dimensional materials.
File in questo prodotto:
File Dimensione Formato  
1-s2.0-S0008622319307997-main.pdf

solo utenti autorizzati

Tipologia: Versione editoriale
Licenza: Non Pubblico - Accesso privato/ristretto
Dimensione 1.36 MB
Formato Adobe PDF
1.36 MB Adobe PDF   Visualizza/Apri   Richiedi una copia

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11696/61065
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 11
  • ???jsp.display-item.citation.isi??? 10
social impact